To solve the problem pertaining to voltage overshoot arising from frequent switching in CAN transceiver interface circuits, and to mitigate electromagnetic interference while protecting the circuit, this paper proposes a new low-voltage overshooting CAN transceiver interface circuit based on a 0.18 μm BCD. The high-voltage switching transistor is controlled by comparing the bus voltage with a reference voltage to achieve real-time monitoring and protection of the bus voltage. The simulation results show that the interface circuit has excellent power consumption, anti-interference ability, and signal integrity, with a power consumption of 24.2 μA and bus voltage symmetry of 0.934-1.052 under the passive state of the bus.

This study presents the relation between transmission cross section (TCS) and directivity (D) of a narrow slot in an infinitesimally thin and perfectly conducting screen. Although TCS is recognized to increase proportionally with increasing D according to 2Dλ²/4π, this paper shows that TCS is not proportional to D in the imperfect transmission. The resonant transmission (RT) factor defined by D, 0 ≤ K_RT ≤ 1, was used to explain the transmission quality related to TCS and D. The perfect-RT (K_RT = 1) occurs at the first resonance slot length as a perfect parallel resonance and leads to perfect transmission. In this perfect-RT, TCS is equal to 2Dλ²/4π. However, the imperfect-RT (K_RT < 1) occurs at the second resonance slot length and thereafter as an imperfect resonance and leads to imperfect transmission. In this case, TCSs are not equal to 2Dλ²/4π due to the imperfect resonance caused by the stored reactive power.

This paper proposes a novel topology of grain-oriented electrical steel permanent magnet synchronous motor (GO-PMSM) with spliced teeth-yoke structure for electric vehicles, aiming to address the vibration challenges under high power density demands. Two motors (GO-PMSM and NO-PMSM) with identical dimensions were designed. Through theoretical analysis and multiphysics finite element modeling, the magnetostrictive and electromagnetic force-induced vibrations were investigated. Simulations revealed that GO-PMSM exhibits 18.32% higher average torque and increased radial flux density due to anisotropic permeability. Experimental results demonstrated that the primary vibration sources are the 12th-order electromagnetic force harmonics (0th and 48th spatial orders) and the 10th/14th harmonics (8th spatial order). Notably, GO-PMSM shows significantly higher low-frequency vibration (below 1500 Hz) caused by magnetostriction in the teeth. This study highlights the trade-off between power density enhancement and vibration amplification in GO-PMSM, providing critical insights for high-performance motor design.

A V_AQ-based DAC switching scheme is proposed to improve the power efficiency of SAR ADCs. The input signals are sampled onto bottom-plates of the most significant bit (MSB) capacitors, thereby eliminating the reset energy. The reference voltage V_CM rather than V_REF is switched during the third-bit cycle, thus significantly reducing the power consumption. Additionally, an energy-efficient one-sided switching technique is employed from the fourth-bit cycle. This proposed switching scheme achieves a 99.51% reduction in switching energy over the classic scheme. The ADC with the proposed switching scheme is designed in 0.18-μm CMOS technology. It consumes 37.7 nW at a sampling rate of 20 KS/s and 0.6 V supply, and achieves the ENOB of 9.59 bits, resulting in a figure of merit (FOM) of 2.45 fJ/conversion-step.

A high-quality, high-yield integration of oriented M-type thick ferrite film with a SiC substrate through a simple and robust low-temperature thermocompression bonding technique is reported, solving the issue that ferrite devices, particularly ferrite circulators, cannot be integrated with planar RF circuits. Based on this bonding technique, a miniaturized self-biased circulator is successfully integrated onto a SiC substrate. This circulator, measuring 3.0 mm × 2.8 mm and operating at 35 GHz, exhibits a relatively low insertion loss of 1.2 dB, a bandwidth of 2.5 GHz, and a maximum isolation of 17 dB.

A fully tunable bandpass filter based on convex resonators is proposed in this letter. Independent tuning of the center frequency and bandwidth of the filter is achieved by adjusting the tunable capacitors loaded at different positions on the resonator. This tunable filter has the advantages of large design freedom, wide adjustment range, and easy cascading to improve the out of band suppression performance. To verify the proposed idea, a 3-order fully tunable bandpass filter was designed and fabricated. The measured results show that the center frequency of the fully tunable filter can be tuned in the range of 223 MHz-53 7MHz, with a frequency variation range of 82.6%, and a 3 dB bandwidth tunable in the range of 54 MHz-73 MHz.

Cost aggregation is a crucial step in the accurate stereo depth estimation process known as semi-global matching. However, this step is challenged by storing large amounts of aggregated data, which is necessary to achieve high matching accuracy under large resolution and large disparity conditions. In this paper, we propose a multi-path optimization aggregation strategy and re-select the complementary combinations of key paths in the forward and backward scanning directions to improve the matching accuracy as much as possible. An error rate of only 5.21% is achieved on the KITTI 2015 dataset. Next, we propose DCT-based truncated compression and selective storage to alleviate the problem of memory increase due to the introduction of reverse critical aggregation paths. Experiments show that the matching error rate increases by only 0.6% on the KITTI 2015 dataset with 53% memory savings. Finally, 1920 × 1080 @62 fps @128 MHz is achieved on ZCU102 FPGA.

We propose a novel device for sub-terahertz (sub-THz) signal generation via optical difference frequency generation (DFG). The device features a T-branch waveguide with two components: a LiTaO₃ crystal-embedded main waveguide for sub-THz signal generation and a sapphire (Al₂O₃) dielectric waveguide side branch that acts as a coupler. In the experiment, a 100 GHz signal is successfully generated, and the T-branch configuration efficiently separates the lightwaves from the generated signal, facilitating integration into advanced sub-THz applications. The measured frequency response of the proposed device is in very good agreement with the calculated results.

This paper proposes a scheme for applying space vector control method to a Switched Reluctance Generator (SRG) system with a ring winding structure. This paper focuses on the rectification system of SRG system, primarily analyzing the simulation model of the proposed system and the dual closed-loop control strategy for voltage and current. A solution has been developed to handle the strongly nonlinear and tightly coupled structure of the SRG when adopting the inner current loop control, and the issue of sector abrupt change that occurs when traditional control strategies are applied to the SRG system has been resolved. The performance of the SRG with a ring winding structure under different control strategies is compared in Simulink, verifying the effectiveness of the control strategy. Finally, the authenticity of the proposed control strategy is further validated on an experimental platform.

For neural network accelerators with General Matrix Multiplication (GEMM) as the computational core, the input feature maps of convolution must be converted into 2D matrices through the Im2col operation. Conventional approaches utilize CPUs to execute Im2col management and data transfer operations. Conventional methods suffer from memory expansion due to redundant data in overlapping convolutional windows, thus incurring non-negligible memory access energy consumption and transmission latency overheads. This severely limits the feasibility of efficient GEMM acceleration in resource-constrained edge devices. This paper proposes a novel Low Memory Access Im2col Method (LMAI2C) and present its dedicated hardware implementation. By restructuring data from overlapping convolutional windows, LMAI2C significantly reduces DRAM memory access volume while improving feature map transfer efficiency. Experimental results on convolutional layers of the YOLOv4-tiny network demonstrate that LMAI2C reduces DDR memory access by approximately 79.8% compared to traditional methods. Furthermore, LMAI2C demonstrates an average speedup of 69 times compared to CPU-based methodologies and 43 times over DMA-accelerated CPU implementations.